操天, 刘伟强, 朱玉莹. 面向可容错计算的近似Booth乘法器设计[J]. 微电子学与计算机, 2018, 35(7): 67-71.
引用本文: 操天, 刘伟强, 朱玉莹. 面向可容错计算的近似Booth乘法器设计[J]. 微电子学与计算机, 2018, 35(7): 67-71.
CAO Tian, LIU Wei-qiang, ZHU Yu-ying. Design of Approximate Booth Multipliers for Error-Tolerant Computing[J]. Microelectronics & Computer, 2018, 35(7): 67-71.
Citation: CAO Tian, LIU Wei-qiang, ZHU Yu-ying. Design of Approximate Booth Multipliers for Error-Tolerant Computing[J]. Microelectronics & Computer, 2018, 35(7): 67-71.

面向可容错计算的近似Booth乘法器设计

Design of Approximate Booth Multipliers for Error-Tolerant Computing

  • 摘要: 本文提出了一种通过近似因子来实现精度可调的近似Booth乘法器的设计方法, 并利用归一化的平均误差距离及功耗延时的乘积来评估近似乘法器的可靠性与硬件复杂度.综合考虑可靠性与硬件复杂度, 本文所设计的近似乘法器与已有设计方案相比性能更优, 并在图像处理等可容错计算应用中显示出较好的应用价值.

     

    Abstract: This paper proposes the approximate Booth multipliers whose accuracy can be adjusted by changing the so called approximate factor. The reliability and hardware complexity of the proposed multiplier are evaluated by the normalized mean error distance (NMED) and power-delay product (PDP). Considering both the reliability and hardware complexity, the proposed designs are better than the existing approximate Booth multipliers. Case studies into image processing show the validity of the proposed approximate multipliers.

     

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