Abstract: Poly-silicon gate etching process based on the 0.35μm CMOS was studied in detail,and the formation mechanism of silicon loss and profile T on the sidewall was investigated in this paper.Moreover,the paper optimized the etch process and finally found the "two procedures of Main Etch" method to solve the problems of silicon loss and profile T,by not changing other process conditions of CMOS.The result is accorded with the 0.35μm CMOS process specification very well.The paper has the theoretical direction and practical value.