基于Verilog的有限状态机设计与优化

Verilog Design and Optimization of FSMs

摘要: 研究了不同的状态机编码 (二进制、格雷码、独热码) 和不同的状态机描述方式 (one always, two always, three always) 的优点和缺点, 并分析了他们对有限状态机性能的影响.分别使用XilinxISE和Design Compiler对一个实例进行了综合, 分析了其面积、速度和功耗的信息.结果表明, one always的写法需要被摒弃;two always的编码风格适合Moore型状态机;而three always的编码风格适合Mealy型状态机.同时也给出了适合不同设计的最优状态编码.

Abstract: Based on an example, the character of different FSMs coding style (one always, two always, three always) and different state encoding (Binary-code, Gray-code, One-hot code) is introduced;their effect on performance and reliability of FSMs is analyzed.Then, the area, speed and the power result of Xilinx ISE synthesis and Design Compiler synthesis is given to analyze the best coding style.That is one always style should be abandoned;two always style suit to Moore FSMs;three always style suit to Mealy FSMs.And the state encoding which appropriate to the design is given.