Abstract: A RAM-tag BTB structure specifically for the application in embedded system is proposed in this paper, and the approach of hardware simulation (the control logic parts of CPU and BTB are implemented in RTL-models, while the BTB memory is simulated in circuit-model form) is employed to study the influence on the performance and the power dissipation of BTB and the whole processor imposed by BTB, finally, based on the simulation, the optimum parametric solution for the BTB structure is attained.Moreover, a CAM-tag BTB is designed based on these parameters.According to the SPEC2000 evaluation, the power consumption of CAM-tag BTB is reduced by 37.17% comparing with that of the RAM-tag BTB.