Abstract: A flip-flop with power failure data retention, using phase change material as rewritable storage units, is proposed.The flip-flop consists of four parts: a double set DFF with the function of power failure data retention, power on/off detector, read and write circuit of phase-change memory cell and Reset/Set signal generator.So that data can be saved when power is off and recovered when power is on.Based on 0.13 μm SMIC static CMOS process, the flip-flop is simulated in Candence.Under the condition of 0.15 μs/V power-down speed, data can be recovered in 30ns after power up.