李佳琦, 李健, 党相甫, 冯伟. 基于固态硬盘的闪存阵列并行结构设计[J]. 微电子学与计算机, 2010, 27(4): 85-88,94.
引用本文: 李佳琦, 李健, 党相甫, 冯伟. 基于固态硬盘的闪存阵列并行结构设计[J]. 微电子学与计算机, 2010, 27(4): 85-88,94.
LI Jia-qi, LI Jian, DANG Xiang-fu, FENG Wei. Design of Parallel Structure of Flash Memory Array Based on Solid State Disk[J]. Microelectronics & Computer, 2010, 27(4): 85-88,94.
Citation: LI Jia-qi, LI Jian, DANG Xiang-fu, FENG Wei. Design of Parallel Structure of Flash Memory Array Based on Solid State Disk[J]. Microelectronics & Computer, 2010, 27(4): 85-88,94.

基于固态硬盘的闪存阵列并行结构设计

Design of Parallel Structure of Flash Memory Array Based on Solid State Disk

  • 摘要: 闪速存储器是固态硬盘的主要存储介质, 但是其较低的写入速度无法满足系统对数据的高速传输要求, 从而影响到固态硬盘的整体性能.为提高闪存阵列的写入带宽, 在分析Flash器件的工作原理、流水线技术及并行总线技术的基础上, 提出了一种可行的并行结构, 估算并验证了采用此方案后的带宽提高情况.

     

    Abstract: Flash Memory is the main storage medium of Solid State Disk, but its lower write speed can not meet the high-speed data transmission requirements of the system, thus affecting the overall performance of Solid State Disk. To improve the write bandwidth of flash memory array, this paper designed a viable structure based on the analysis of working principle of Flash device, pipelining technology and high band-width buses technology. At last, it estimated and verified the improvement of bandwidth after adopting this solution.

     

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