Abstract: Based on 0.18μm RF CMOS Process,this paper presents a fully integrated received signal strength indicator,which integrates limiting amplifier,full wave rectifier,offset subtractor,dc-offset extractor and output buffer.The RSSI circuit provides amplified intermediate frequency output signal and RSSI output voltage to indicate the input signal strength.By applying weak current biased transconductor in the dc-offset extractor,the layout area has been significantly reduced.It’s helpful to higher integration and lower cost.As a result,the RSSI circuit is not only suitable for low IF receiver,but also zero IF.Measurement results demonstrate the input linear detection range is larger than 55 dB.The prototype occupies active area of 0.033 mm²,while consumes 3.1 mA current.