基于FPGA的软硬件协同仿真平台的数据通路设计

Data Path Design of FPGA-based HW/SW Co-simulation Platform

摘要: 针对当前SoC设计过程中仿真速度过慢的问题，基于PLI机制，设计了一种能够有效支持基于FPGA的软硬件协同仿真平台的数据通路.其中PC端利用仿真工具和winsock API构建了激励产生和传输的下行通路，在FPGA端，利用Microblaze组成的SoC建立仿真数据加载和结果反馈的上行通路，同时两端通过以太网实现物理传输.最后，上述方案在Xilinx开发板实现，实验结果表明，该设计能够有效提高仿真效率并且能够支持大规模SoC的软硬件协同仿真，同时具有硬件开销小、通用性强等优点.

Abstract: Since the simulation speed is too low for current SoC design process,based on PLI mechanism,we design a data path that efficiently supports FPGA-based HW/SW co-simulation platform.With simulation tools and winsock API,the PC terminal constructs downstream channel that generates and transmits stimulus.With the SoC based on Microblaze,the FPGA terminal constructs upstream channel that is responsible for simulation data loading and results feedback.Both terminals complete physical transmission through Ethernet.Finally,the whole project implemented with Xilinx development board.Experimental results show that this design can effectively improve simulation efficiency and support HW/SW co-simulation of large scale SoC.Meanwhile,the design has the advantages of low hardware cost and strong universality.