许川佩, 刘标. 基于高速数据采集的NoC路由器设计[J]. 微电子学与计算机, 2017, 34(11): 140-144.
引用本文: 许川佩, 刘标. 基于高速数据采集的NoC路由器设计[J]. 微电子学与计算机, 2017, 34(11): 140-144.
XU Chuan-pei, LIU Biao. Design of NoC Router Based on High Speed Data Acquisition[J]. Microelectronics & Computer, 2017, 34(11): 140-144.
Citation: XU Chuan-pei, LIU Biao. Design of NoC Router Based on High Speed Data Acquisition[J]. Microelectronics & Computer, 2017, 34(11): 140-144.

基于高速数据采集的NoC路由器设计

Design of NoC Router Based on High Speed Data Acquisition

  • 摘要: 针对NoC数据处理量越来越大, 确定性算法在数据量较大时, 数据包传输延迟增大, 而简单的自适应算法占用过多的片上资源等问题, 将改进XY自适应算法应用在片上网络中, 节点设计基于2D_Mesh拓扑结构、虚通道技术的虫洞交换模式.采用VerilogHdl语言完成NoC路由节点中各个模块的设计, 并在Modelsim软件上进行仿真, 最终在FPGA上实现NoC路由器功能.实验结果表明, 设计的路由器能够满足高速数据的处理, 且不会有延迟、死锁等问题的发生.

     

    Abstract: Since the quantity of data process for NoC is more and more large, the packet transmission delay is increased with the deterministic algorithm. However, the simple adaptive algorithm takes too many on-chip resources.To solve the problems, the improved XY adaptive routing algorithm is adopted in this paper. We design node based on 2D_Mesh topology structure and wormhole switching mode of virtual channel technology. In addition, VerilogHdl language is used to complete the design of each part function for NoC routing node. Finally, the simulation experiment is carried out on Modelsim software and the function of NoC routing node is implemented on FPGA. Experimental results show that, the router designed in this paper can satisfy the process of high speed data and avoid the delay and deadlock issues.

     

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