Abstract: This paper presents a classification of the redundant registers, and provides three kinds of redundancy removal sequential optimization techniques according the characteristic of each kind of redundant registers.We classify these redundant registers into three categories: the first one is the constant register whose output value in all the reachable state space is always constant value, and the second one is those registers have the same inputs, and the third one is those registers have no influence for all the Primary Output value in the circuit.Based on AIGs (And-Inverter Graphs), Three-Valued simulation, sharing registers and COI reduction are combined together to realize the removal of the three kinds of redundant registers.It can reduce the numbers of the registers and logic gates to optimize the area of the sequential network.Experiments show that the presented algorithm can get an average reduction of registers by 23% and logic gates by 26% respectively.