片上Flash测试接口的设计

Test Interface Design for On-chip Flash

摘要: 提出了一种DSP上嵌入式Flash存储器的测试接口设计。结合对Flash IP 接口分析以及测试的要求，实现了测试接口引脚复用设计和接口逻辑转换的设计，设计在减少测试引脚数量的同时准确并完整地实现了对片上Flash的测试，满足了设计的可测试性。通过NCsim仿真验证，设计达到了测试要求，并成功应用于一款32位定点DSP芯片中。

Abstract: A new kind of test interface for embedded Flash IP of DSP on chip is presented in this paper.By analyzing the interface of Flash IP and the test requirement,we realize the pin multiplexing logic design and the address/data converter logic design.The design reduces the number of test pins while accurately and completely test the on-chip Flash, meeting testability of the design. Simulation by Ncsim, the design meet the testing requirements,and successfully applied to a 32-bit fixed-point DSP.