陈笑, 魏廷存, 刘伟. 数字自校准12-bitSAR-ADC的系统级设计与仿真[J]. 微电子学与计算机, 2014, 31(7): 73-76,83.
引用本文: 陈笑, 魏廷存, 刘伟. 数字自校准12-bitSAR-ADC的系统级设计与仿真[J]. 微电子学与计算机, 2014, 31(7): 73-76,83.
CHEN Xiao, WEI Ting-cun, LIU Wei. The System-level Design and Simulation of Digital Self-calibrating 12-bit SAR-ADC[J]. Microelectronics & Computer, 2014, 31(7): 73-76,83.
Citation: CHEN Xiao, WEI Ting-cun, LIU Wei. The System-level Design and Simulation of Digital Self-calibrating 12-bit SAR-ADC[J]. Microelectronics & Computer, 2014, 31(7): 73-76,83.

数字自校准12-bitSAR-ADC的系统级设计与仿真

The System-level Design and Simulation of Digital Self-calibrating 12-bit SAR-ADC

  • 摘要: 逐次逼近模数转换器(SAR-ADC)具有低功耗和小面积的特点.针对12-bit SAR-ADC,对其中的电阻-电容式DAC的输出电压误差进行了分析,并给出了相应的校准算法,以提高SAR-ADC的精度.基于该电路结构和校准算法,搭建了MATLAB/Simulink系统级模型,经仿真验证,校准后ADC的静态特性和动态特性均得到了显著改善,DNL和INL分别减小约1LSB和2LSB,ENOB约增加1bit.

     

    Abstract: Successive-Approximation-Register Analog-to-Digital Converter (SAR ADC) has the characteristics of low power consumption and small area.In this paper,for the 12-bit SAR-ADC,the output voltage errors of the built-in C-R DAC are analyzed,and the corresponding calibration algorithm is proposed to improve the precision of the SARADC.Based on the circuit structure of 12-bit SAR-ADC and the calibration algorithm,the MATLAB/Simulink system-level model is established.The simulation results show that,the static and dynamic properties of SAR-ADC are significantly improved,the DNL and INL are decreased about 1LSB and 2LSB,respectively,and the ENOB is increased about 1bit.

     

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