一款CAN总线收发器芯片的电路设计
Design for a Transceiver Apply to CAN BUS
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摘要: 文中完成一款应用于CAN总线的收发器芯片的电路设计.重点阐述了该收发器芯片的功能框图及其工作原理, 特别是接收模块和过压保护的设计.该电路采用5V电源, 驱动总线负载为R=60Ω、C=200pF.仿真结果表明该电路工作时的平均电流为35.7mA, 电路总的延迟时间为160ns, 具有较好的过压保护功能, 可应用于高速CAN总线通讯中.Abstract: In this paper, a transceiver for CAN bus is designed.The functional diagram and the designation on over-voltage protection and receiver module of this transceiver are principally introduced.The power supply of this chip is 5V, and this chip can drive a load such as 60Ω resistance and 200pF capacitance.Simulations show that its average current is 35.7mA and the total delay is 160ns when the circuit works.With the good performance of over-voltage protection, this circuit can be applied in the communication of high-speed CAN bus.
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