Abstract: Reconfigurable architectures,which are efficient and flexible,can meet the high performance needs of embedded processing field. This paper models three coarse-grained and two multi-grained typical reconfigurable architectures,then classifies algorithm and maps different types of algorithm on the reconfigurable architectures. Analysis has five parts:hardware utilization,computing time,input and output bandwidth,data arrangement and data reuse rate.Conclusion is that multi-grained reconfigurable architecture with flexible interconnect can perform different algorithms better, however, hardware utilization rate is a little lower. Data bandwidth is still the bottleneck of reconfigurable architectures.Provide theoretical basis for later design of reconfigurable architectures.