黄新星, 王小力. 一种基于CORDIC算法改进的高速低功耗DCT协处理器设计[J]. 微电子学与计算机, 2011, 28(7): 89-92.
引用本文: 黄新星, 王小力. 一种基于CORDIC算法改进的高速低功耗DCT协处理器设计[J]. 微电子学与计算机, 2011, 28(7): 89-92.
HUANG Xin-xing, WANG Xiao-li. A High-Speed Low-Power Modified CORDIC DCT Coprocessor[J]. Microelectronics & Computer, 2011, 28(7): 89-92.
Citation: HUANG Xin-xing, WANG Xiao-li. A High-Speed Low-Power Modified CORDIC DCT Coprocessor[J]. Microelectronics & Computer, 2011, 28(7): 89-92.

一种基于CORDIC算法改进的高速低功耗DCT协处理器设计

A High-Speed Low-Power Modified CORDIC DCT Coprocessor

  • 摘要: 介绍了一种支持MPEG2压缩协议,应用于ARM9内核、高速低功耗的二维DCT协处理设计研究.该协处理器利用行列分解法,并行优化实现二维DCT数据结构,明显提高了8×8数据块的处理速度.与此同时,应用改进的CORDIC算法——移位代替乘法并优化移位算法实现一维DCT.仿真结果表明,对于此种一维DCT算法硬件实现,在符合MPEG2精度和ARM9数据传输频率的前提下比文献2速度提高了30%,面积却减少了50%.这种协处理器可以在移动多媒体设备的编解码模块中得到广泛应用.

     

    Abstract: A supported MPEG2 protocol, applied to ARM9 core, high-speed and low-power two-dimensional DCT coprocessor is introduced.With the optimization of the structure of two-dimensional DCT co-processor, the speed of processing 8×8 block is largely improved.At the same time, A modified one-dimensional DCT CORDIC algorithm is applied, using a special shifter in place of traditional multiplier.The simulation result showed that, Based on the precision and the transition frequency requirement, for this one-dimensional DCT implemented by hardware, the speed is 30% faster than paper2 while the area has decreased by 50%.This Coprocessor can be largely used in the Code/Decode module of multimedia products.

     

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