基于FPGA的KLT特征点选取IP核的设计
Design of FPGA-based Feature Points Selection IP Core for KLT
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摘要: 针对传统KLT算法的特征点选取存在计算耗时、通用性差等缺点,提出一种以可并行归并排序为基础的通用KLT特征点选取方法,并在FPGA上实现通用IP核设计.实验结果表明该IP核以较少硬件资源实现了KLT特征点实时选取,并具备较好的通用性,能够满足实际应用的需求.Abstract: To solve the disadvantage of traditional feature points selecting method such as calculation time-consuming and poor universal,a universal parallelized method for selecting feature points is proposed and its IP core for FPGA is designed.The result of experiment demonstrates this IP core achieve a good real-time performance with fewer resources consumption,and has good versatility,which can meet the needs of applications.
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