Abstract: With the rapid development of wireless communication standards and the proliferation of operating modes in various protocols, the cost and time to design an ASIC for a particular mode is unbearable. At the same time, the use of a general-purpose microprocessor for signal processing is too slow to meet the needs. Therefore, this paper attempts to implement typical channel estimation algorithms in a MIMO-OFDM system on a dynamic reconfigurable processor architecture, which can balance the flexibility of hardware implementation and the efficiency of processing speed. It is simulated at a clock frequency of 1 GHz in 28 nm process, and its processing speed can reach 8.8 to 14.6 times of that of a general-purpose microprocessor.