非易失性突触存储阵列及神经元电路的设计

Design of Non-Volatile Synapse Array and Neuron Circuits

摘要: 传统的神经形态芯片一般采用SRAM阵列来存储突触权重, 掉电后数据会丢失, 且只能通过单一地址译码进行存取, 不利于突触权重的更新.为此, 本文基于40 nm先进工艺并结合嵌入式相变存储器设计了一种非易失性突触存储阵列及神经元电路, 为神经元的突触权重存储和更新提供了一种有效、高速和低功耗的解决方案.

Abstract: Traditional neuromorphic chips generally use SRAM array to store the synaptic weights, which would lose data once power down. And the SRAM array can only be accessed through a single address decoding, which is not suitable for synaptic weights update. In this paper, a non-volatile synapse array and neuronal circuits based on 40 nm process combining with embedded phase change memory (ePCM) are proposed. This work would provide an effective, high-speed and low-power solution to store and update the neuron synaptic weights.