陶昱良, 何卫锋, 王琴, 毛志刚, 李涌伟, 郑吉君. 多标准宏块预测与边界强度计算的VLSI架构及应用[J]. 微电子学与计算机, 2011, 28(6): 26-30.
引用本文: 陶昱良, 何卫锋, 王琴, 毛志刚, 李涌伟, 郑吉君. 多标准宏块预测与边界强度计算的VLSI架构及应用[J]. 微电子学与计算机, 2011, 28(6): 26-30.
TAO Yu-liang, HE Wei-feng, WANG Qin, MAO Zhi-gang, LI Yong-wei, ZHENG Ji-jun. A VLSI Architecture and Application for Multi-Standard Macro-block Prediction and Boundary Strength Calculation[J]. Microelectronics & Computer, 2011, 28(6): 26-30.
Citation: TAO Yu-liang, HE Wei-feng, WANG Qin, MAO Zhi-gang, LI Yong-wei, ZHENG Ji-jun. A VLSI Architecture and Application for Multi-Standard Macro-block Prediction and Boundary Strength Calculation[J]. Microelectronics & Computer, 2011, 28(6): 26-30.

多标准宏块预测与边界强度计算的VLSI架构及应用

A VLSI Architecture and Application for Multi-Standard Macro-block Prediction and Boundary Strength Calculation

  • 摘要: 提出一种支持H.264 High Profile 4.1和AVS JiZhun Profile 6.0的多标准宏块预测与边界滤波强度计算的VLSI架构, 该架构根据解码器的算法特点, 实现了H.264和AVS标准中控制占优的帧内模式预测、帧间运动矢量预测以及边界滤波强度计算算法, 能应用于当前的可重构多媒体系统.对该架构进行实现后, 采用TSMC 65nm工艺综合, 工作频率可达到312 MHz, 解码一个H.264和AVS宏块最大分别消耗351和189个时钟周期, 能够满足H.264和AVS高清 (1080p) 实时处理的需求.

     

    Abstract: In this paper, a VLSI architecture is proposed for macro-block prediction and boundary strength calculation which supports H.264 (High Profile 4.1) and AVS (JiZhun Profile 6.0) video decoder.The control-dominant algorithms, intra mode prediction, motion vector prediction and boundary strength calculation in H.264 and AVS are implemented by this architecture that can be applied to the current reconfigurable multi-media systems.After design implementation, the work frequency can be up to 312MHz at TSMC 65nm technology library.The number of maximum cycles to decode one H.264 and AVS macro-block is 351 and 189 respectively, which meets the requirement of real-time processing for H.264 and AVS High Definition (1080p) .

     

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