针对一种岛式FPGA布局布线方法的研究与改进
Improvement of Place and Route for an Island-Style FPGA
-
摘要: 针对一种岛式FPGA (Field Programmable Gate Array)芯片VS1000的架构,开发了一种布局布线工具VA,该工具在VPR的基础上做了两方面改进.第一,在传统布线算法的布线资源图基础上建立了全局信号布线资源图,完成了对全局信号的布线,使全局信号布线与其他信号布线独立起来,以达到减少全局信号相对延时和节省通用布线资源的目的.第二,提出了两种新的布线顺序:高扇出线网优先和高关键度线网优先.实验结果表明,对于标准测试电路,高扇出优先的布线顺序平均可减少21.8%的迭代次数,高关键度优先的布线顺序平均可减少22.3%的关键路径延时.Abstract: A place and route tool VA is exploited for an island-style FPGA VS1000 architecture.It makes two improvements on the basis of VPR.Firstly, global signal routing resource graph based on routing resource graph of traditional routing algorithm was established.Global signal routing was completed in order to separate global signal routing and common signal routing for the purposes of reducing relative delays of global signals and saving common routing resource.Secondely, this research proposes two new route orders: high fanout priority and high criticality priority.Experimental results show the iterations can be reduced by 21.8% on average under high fanout priority order, the critical path delay can be reduced by 22.3% on average under high criticality priority order.
下载:
