Abstract: Based on the low-power,low-noise and high-precision features of front-end readout circuits for CZT detector,a 12-bit,1Msps successive approximation register analog-to-digital converter(SAR ADC) is designed.The ADC consists of digital-to-analog converter(DAC),comparator,and so on.The DAC is implemented using charge scaling technique and principle of charge conservation,thus the matching accuracy of the scaling capacitor is improved.The comparator is multi-stage pre-amplifier and dynamic latch cascade structure;its offset error is minimized by using output offset calibration technique.The circuit is implemented and simulated in TSMC 0.18μm mixed signal CMOS technology.Testing results show that,SAR ADC has-0.1/0.37 LSB DNL,-0.44/0.32 LSB INL,65.33dB SNR,10.55-bit ENOB and 1.17mW power consumption.The performances meet the requirements of the front-end readout circuits.