高速Booth编码模(2n-1)乘法器的设计
Novel Modified Booth Modulo (2n——1) Multipliers
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摘要: 在余数系统中(2n-1)是最普遍应用的模,提出了一种新的booth编码结构,并基于提出的booth编码结构,提出了一种高速模(2n-1)乘法器.该乘法器采用CSA或者Wallace Tree结构可以进一步提高运算速度.此乘法器在一个时钟周期内可以完成所需运算,简单高效.Abstract: (2n-1) is one of the most commonly used moduli in Residue Number Systems.In the paper we propose a novel Booth encoding architecture.Based on the proposed booth encoding architecture,we can design high speed and high-efficient modulo (2n-1) multipliers,which are the fastest among all known modulo (2n-1) multipliers.