Abstract: To circumvent the problem caused by write-disturb in write process of asynchronous Dual-Port SRAM, a new word-line pulse control technique is proposed. A minimum word-line pulse of write port is determined to do the write operation successfully; A clock edge detection circuit is designed to handle the write-disturb caused by write operation of the other port. Using N28HPM technology of TSMC, backend simulation is performed after RC extraction; Results show the proposed method is feasible and effective.