姜鑫, 唐广, 吴斌. 可配置高精度FFT/IFFT的设计[J]. 微电子学与计算机, 2010, 27(7): 44-48.
引用本文: 姜鑫, 唐广, 吴斌. 可配置高精度FFT/IFFT的设计[J]. 微电子学与计算机, 2010, 27(7): 44-48.
JIANG Xin, TANG Guang, WU Bin. Design of Configurable High-precision FFT/IFFT Processor[J]. Microelectronics & Computer, 2010, 27(7): 44-48.
Citation: JIANG Xin, TANG Guang, WU Bin. Design of Configurable High-precision FFT/IFFT Processor[J]. Microelectronics & Computer, 2010, 27(7): 44-48.

可配置高精度FFT/IFFT的设计

Design of Configurable High-precision FFT/IFFT Processor

  • 摘要: 提出了一种可配置高精度FFT/IFFT处理器的设计.设计中采用单蝶形混合基串行结构,降低了系统的复杂性,节省了一定的资源.提出了一种新颖的块浮点算法,有效避免了溢出问题并且提高了精度.运算点数可以通过对产生地址计数器的位选择配置为64、128、256、512、1024,实部、虚部均为16bit数据,不仅可以实现FFT运算,还可以实现IFFT运算.在SMIC0.13μm CMOS工艺下综合的面积为1.55mm2,最高频率为210MHz.测试结果显示了本设计的高精度特性.

     

    Abstract: Present a design of configurable high-precision FFT/IFFT processor. The whole design uses mixed radix serial architecture, reducing the system complexity and saving hardware resource. Present a novel block floating point algorithm which solves the overflow in long point FFT effectively and improves precision. The point can be configed to 64、128、256、512、1024 by controlling counter for generating address, and the real and imaginary parts of data are 16 bits, the design not only can implement FFT, but also can implement IFFT. The proposed processor is designed in a SMIC 0.13μm CMOS process, the area is 1.55mm2.The highest clock frequency is 210MHz. The test result shows high-precision of the design.

     

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