王晓泾, 崔晓平, 王大宇. Sklansky并行前缀加法器的优化设计[J]. 微电子学与计算机, 2013, 30(1): 97-99.
引用本文: 王晓泾, 崔晓平, 王大宇. Sklansky并行前缀加法器的优化设计[J]. 微电子学与计算机, 2013, 30(1): 97-99.
WANG Xiao-jing, CUI Xiao-ping, WANG Da-yu. An Optimal Design for Sklansky Parallel Prefix Adder[J]. Microelectronics & Computer, 2013, 30(1): 97-99.
Citation: WANG Xiao-jing, CUI Xiao-ping, WANG Da-yu. An Optimal Design for Sklansky Parallel Prefix Adder[J]. Microelectronics & Computer, 2013, 30(1): 97-99.

Sklansky并行前缀加法器的优化设计

An Optimal Design for Sklansky Parallel Prefix Adder

  • 摘要: Sklansky结构是并行前缀加法器中一种典型的结构,但其过大扇出引起的延时增加使得对它的使用受到了限制.本文针对该问题提出了一种优化方法,它通过增加相同进位单元使得扇出系数最大为2.在Synopsys公司综合工具Design Compiler上的综合结果显示,该方法在增加极小的面积的情况下使得Sklansky结构的延时降低了至少14.5%.

     

    Abstract: Sklansky structure is known as a typical scheme in parallel prefix adders.But the increase of delay caused by its big fanout restricts its implementation.In this paper,an optimization for this problem is proposed that same carry operators are added to ensure a maximum of two fanouts.The synthesis on Synopsys Design Compiler reveals that at least 14.5% delay reduction is achieved at the expense of minimum area increase.

     

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