阶梯浅沟槽隔离结构LDMOS耐压机理的研究

Research on Breakdown Mechanism of LDMOS with Step Shallow Trench Isolation in the Drift Region

摘要: 提出了一种具有阶梯浅沟槽隔离结构的LDMOS.阶梯浅沟槽结构增加了漂移区的有效长度,改善了表面电场及电流的分布,从而提高了器件的击穿电压.借助器件模拟软件Silvaco对沟槽深度、栅长及掺杂浓度等工艺参数进行了优化设计.结果表明,在保证器件面积不变的条件下,新结构较单层浅沟槽隔离结构LDMOS击穿电压提升36%以上,而导通电阻降低14%.

Abstract: A novel LDMOSFET with Step Shallow Trench Isolation(SSTI) in the drift region is proposed． With this design, the effective length of drift region is increased, and the surface electrical field becomes more uniformly distributed, resulting in a higher breakdown voltag e. The device trench depth, gate length and doping concentration are further optimized. In computer simulation, when compared with a Monolayer-STI LDMOS(MSTI-LDMOS) with the same area, the breakdown voltage of the new device is 36% higher, and has a 14% lower on-resistance.