Abstract: In order to solve the problem of mass data transmission between chips and external devices, the interface of data transmission is designed based on the optical fiber communication technology in this paper. The communication protocols and the interactive interface architectures are bulit in the interface to realize communication and verification between layers of the network. Many IP providers support the AXI protocol and it have a robust support platform, so the AXI4-Stream interface is used as a chip-level data exchange interface to support the bursty high-speed data transmission. UDP/IP format is supported for flexible compatibility with various upper-layer applications. The number of port, IP address and address of MAC layer can be set by programmable interface. Pipeline technology and multi-process parallel processing technology are applied to reduce data transmission delay and optimize interface processing performance under the control of area and power consumption. Finally, the design is verified by transmitting data in chip to PC via fiber optic communication and the data transmission data has reached up to 9.691 Gbps. It is demonstrated that the interface is able to meet the high-speed transmission requirement of massive data between chips and external devices.