Abstract: The analog-to-digital converters of low power-consumption are playing more and more important roles in designing SOC and micro-controllers at present.Based on new ultra-low power SAR ADC architecture, an 8bit, 15Msps SAR ADC is implemented in SMIC 0.18μm CMOS process.Instead of traditional active charge redistribution, the method of passive charge sharing is used to both sample the input signal and to perform the binary-scaled feedback during the successive approximation, an asynchronous SAR controller is implemented and optimizes the control logic.The simulation shows that the ADC works very well at the sampling rate of 15Msps, and consumes only 518μW in total.The FOM of the ADC is 0.18pJ/Conv, which is much lower than traditional SAR ADC.