Abstract: In CBC mode, pipeline technique does not work on SM4 algorithm to increase throughput, as there is a feedback path from output to input. Over this problem, a logic simplifying method is proposed, which can reduce delay of one stage of XOR gates in each round function of encryption algorithm of SM4. Based on this method, SM4 with a 4-round-in-1 structure is designed, in which, delay of 4 stages of XOR gates can be reduced in the critical path, and this design has a higher throughput per unit area than the other schemes in this paper. Synthesis results show that the ASIC implementation of SM4 with a 4-round-in-1 structure can achieve 5.24 Gb/s in throughput, which is higher than that of reported designs.