赵旭莹, 李桓, 王晓琴, 王东琳. 基于滑窗流水的高性能可配置viterbi译码器[J]. 微电子学与计算机, 2018, 35(2): 32-36.
引用本文: 赵旭莹, 李桓, 王晓琴, 王东琳. 基于滑窗流水的高性能可配置viterbi译码器[J]. 微电子学与计算机, 2018, 35(2): 32-36.
ZHAO Xu-ying, LI Huan, WANG Xiao-qin, WANG Dong-lin. Sliding Window Pipelined High Performance Reconfigurable Viterbi Decoder[J]. Microelectronics & Computer, 2018, 35(2): 32-36.
Citation: ZHAO Xu-ying, LI Huan, WANG Xiao-qin, WANG Dong-lin. Sliding Window Pipelined High Performance Reconfigurable Viterbi Decoder[J]. Microelectronics & Computer, 2018, 35(2): 32-36.

基于滑窗流水的高性能可配置viterbi译码器

Sliding Window Pipelined High Performance Reconfigurable Viterbi Decoder

  • 摘要: 为了对无线通信卷积编码多标准支持, 同时为了适应未来高速率卷积编码需求, 基于滑窗流水的前向回溯基四算法, 实现了支持多标准的高性能可配置viterbi译码器, 该译码器峰值吞吐可达到1.15Gbps@6144bit, 600 MHz.与主流商用viterbi译码器相比, 全球领先的半导体公司-TI的viterbi译码器VCP2数据处理能力为9.5 Mbps@40bit, 333 MHz, 本文中译码器数据处理能力为32.173 Mbps@40bit, 333 MHz, 性能提升约3.3倍.此外, 该译码器在面积与功耗方面也优于其它可配置型viterbi译码器, 在未来高速率卷积译码中有很大应用前景.

     

    Abstract: In order to support multi-standard for convolutional coding in wireless communication, and to meet the requirement of high data rate in the future. A radix-4 multi-standard high performance reconfigurable viterbi decoder based on the sliding window pipeline technique with forward traceback algorithm was implemented. The peak throughput of the decoder can reach up to 1.15Gbps@6144bit, 600MHz. Compared with the mainstream commercial viterbi decoder, the data processing speed of VCP2 which is proposed by Texas Instruments company is 9.5Mbps@40bit, 333MHz, and the data processing speed of viterbi decoder in this paper is 32.173Mbps@40bit, 333MHz, performance improved about 3.3 times. In addition, the decoder is superior to other reconfigurable viterbi decoders in area and power consumption. It has great application prospect in the future high data rate convolutional decoding.

     

/

返回文章
返回