基于UVM的浮点功能部件验证
Verification of Floating Point Facilities Based on UVM
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摘要: 为了对复杂浮点运算单元进行功能验证, 设计并实现了一种基于UVM (Universal Verification Methodology)方法的验证平台.该平台集成了一套高效的浮点数产生机制, 将浮点用例的求解转化为连分式的求解, 拓宽了传统浮点用例的边界定义, 同时也调用了基于C语言的参考模型来自检计算结果, 并结合FCC (Fast Coverage Convergence)技术, 加快了覆盖率收敛.应用结果表明, 此验证平台能够对浮点运算单元各功能进行高效验证, 极大地减少验证时间, 且平台内嵌的浮点数产生器也能够移植到其他浮点功能验证平台.Abstract: A test-bench was designed and implemented on the basis of UVM to verify all facilities of the floating-point unit. The test-bench integrates an efficient mechanism to generate floating-point operands and expands the corner of traditional cases with the method of convert floating point numbers to continued fractions. It calls a C model to achieve automatic results comparison, in addition to FCC technique, the coverage was converged quickly. Experimental results show that the test-bench can effectively verify all facilities of the floating-point unit and greatly reduce the time, moreover, the floating-point generator can be used for other floating-point verification.