基于SVA的跨时钟域协议验证方法
A Clock Domain Crossing Protocol Verification Method Based on System Verilog Assertions
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摘要: 现代SoC设计不可避免会遇到跨时钟域的问题,分析了五种常用典型跨时钟域同步电路和各常用典型同步电路的协议,针对跨时钟域电路难以验证的问题,提出了基于SystemVerilog断言的跨时钟域协议验证方法.通过采用SystemVerilog断言定义各常用典型跨时钟域电路的协议,使得跨时钟域同步电路的传输协议在功能仿真中得到验证.仿真结果表明此方法能够完成跨时钟域电路协议验证.Abstract: Modern SoC design deals with the issue of CDC inevitably. The five kinds of typical CDC synchronization circuit in common use and their protocols are discussed in detail. A SystemVerilog Assertions based CDC protocol verification method is presented to meet the verification challenge of CDC. The method adopts System Verilog Assertions to define the protocols of the five CDC synchronization circuits, which makes the transfer protocols of the CDC synchronization circuits verified in the functional simulation. The results of simulation show that the method is suitable to do CDC protocol verification.
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