Abstract: Particle filter algorithm has obvious advantages in dealing with non-linear, non-Gaussian systems, but the huge amount of computation limits its real-time application. To solve the problem, this paper proposes the use of FPGA features of high-speed computing and parallel processing to achieve the particle filter algorithm. Each module of particle filter algorithm is implemented in FPGA with Verilog hardware description language, and the modules are respectively verified with functional simulation and timing simulation in Modelsim. The result shows that the designed modules of particle filter algorithm run properly, and can be used for non-linear, non-Gaussian Particle Filtering system. This paper has certain reference value for the hardware implementation of the particle filter algorithm.