Abstract: Due to the large area of the 3D NAND flash memory chip, its power distribution network is huge and complex. It not only needs to meet the 600 mA peak current requirement when multiple blocks are read and written in parallel, but also needs to meet the low power consumption requirements of the chip in the standby. Aiming at these problems, a no off-chip capacitance LDO with distribute NMOS power stages is designed, which suits for the power supply requirement of the CMOS circuit in 3D NAND FLASH. Active/Standby mode operation is designed to reduce system power consumption. In order to enhance the driving capability and meet the requirement of power supply in large CMOS area, a boost circuit which based on switching capacitor circuit is used. The output voltage detection circuit is designed to feed forward controlling the output stage for the purpose of fast transient response. Based on the YMTC CMOS process, the circuit design is completed. The simulation results show that the designed LDO achieves 600 mA load capability with 0.018mV/mA load regulation. The undershoot voltage is 0.21V under 600mA loading current.