Design of Approximate Booth Multipliers for Error-Tolerant Computing

This paper proposes the approximate Booth multipliers whose accuracy can be adjusted by changing the so called approximate factor. The reliability and hardware complexity of the proposed multiplier are evaluated by the normalized mean error distance (NMED) and power-delay product (PDP). Considering both the reliability and hardware complexity, the proposed designs are better than the existing approximate Booth multipliers. Case studies into image processing show the validity of the proposed approximate multipliers.