JI Ze, WANG Ling, WANG Yun. Study of Brushless Motor Gate Driver Circuit Design Based on VDMOS in Paralleling[J]. Microelectronics & Computer, 2014, 31(12): 103-107.
Citation: JI Ze, WANG Ling, WANG Yun. Study of Brushless Motor Gate Driver Circuit Design Based on VDMOS in Paralleling[J]. Microelectronics & Computer, 2014, 31(12): 103-107.

Study of Brushless Motor Gate Driver Circuit Design Based on VDMOS in Paralleling

  • This paper presents a brushless motor gate driver circuit used in high voltage,high current and high power density condition.The method of paralleling VDMOS is adopted to achieve greater current capacity,and placement routing of the circuit are optimized through the hybrid integrated circuit manufacturing process.This paper mainly discusses the feasibility associated with current balances of each VDMOS in parallel,and related key parameters are also analyzed to meet the requirements of working condition (270V/40A).
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