An Expanding Routing Algorithm Based on Hierarchical FPGA

This paper implements a routing algorithm,based on a FPGA chip of Virtex architecture,which testing the single long wire and the connected condition of directly connected switch.Taking use of the hierarchical features of FPGA Cleverly and using the method of overall expanding and cycle routing by line for routing.In the process of routing,taking use of several strategies,such as the whole group,multiple points routing,and comprehensive appraisal etc.,reducing the probability of the post resources conflict and the back rate effectively,enhancing the quality and efficiency of cabling greatly.In the process of demolishing and re-routing,taking partial,instead of integral demolition mechanism,greatly reduce the number of the lines that will be demolished,can greatly improve the speed.The experimental results show that this algorithm has advantages of high efficiency in the wiring,high rate in the coverage of single long wire resources,and high accuracy in fault location etc.