Research on framework design of semi-physical simulation testing environment for FPGA software

According to the shortcomings of low efficiency, insufficient coverage in current simulation testing and physical testing method of FPGA software testing, a design of FPGA semi-physical testing environment based on simulation testing case was proposed. The real FPGA chip was used for running the design under test, the testbench used in simulation testing were parsed and processed into FPGA transmission signals and testing data, and an executor FPGA was designed to simulate the behavior and interface of the external device. Then the testing data and simulation model were transplanted into the executor FPGA to connect the FPGA under test. The design framework was validated by a semi-physical testing environment verification platform, and good results had been achieved.