JIANG Bin, ZHANG Min-min, WANG Qin, JIANG Jian-fei, MAO Zhi-gang. A High-Precision SRAM Timing Parameter Measurement Circuit Based on Delay Line[J]. Microelectronics & Computer, 2017, 34(6): 18-20, 25.
Citation: JIANG Bin, ZHANG Min-min, WANG Qin, JIANG Jian-fei, MAO Zhi-gang. A High-Precision SRAM Timing Parameter Measurement Circuit Based on Delay Line[J]. Microelectronics & Computer, 2017, 34(6): 18-20, 25.

A High-Precision SRAM Timing Parameter Measurement Circuit Based on Delay Line

  • The paper mainly introduced a delay line circuit for SRAM timing parameter measurement. Under the process of SMIC 130nm, the precision could reach 4.9 ps. The delay chain circuit includes programmable and fixed path. Programmable path includes programmable coarse block and fine block; fixed path is made of fixed units. SRAM to be measured and measurement circuit are integrated to a SOC system so as to realize the SRAM function of establishment, hold and access time measurement.
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