System Level Power Modeling for Course-Grained Reconfigurable Processor

In this paper, we propose a system-level power modeling method that can be extended according to different structural parameters for coarse-grained reconfigurable architecture. The method described by the level of methods, respectively, from the architecture, circuit and technology level to establish the power model, and then use the linear model to calculate the overall power consumption of the system. Contrasting the errors of simulation and measured data, the validity of this modeling method is verified. Early in exploring coarse-grained reconfigurable architectures, this approach can be applied to evaluate the power consumption of reconfigurable processors.