An Inverse Transform and Quantization IP Core Design for H.264/AVC

This paper presents a function-complete design of inverse transform and quantization IP core for H.264/AVC decoder.The same architecture is presented to process three different inverse transforms.Each stage of inverse transform and quantization is controlled by separate gated clock.Logic reuse and clock gating make lower power consumption.The implementation results show that the design meets real-time decoding of 1080i stream.