A Communication Mechanism Simulation Model for Multi-core System

A communication mechanism simulation model is introduced which can quickly establish the hardware architecture for multi-core system by abstracting the processing units and interconnect points using the objectoriented design pattern,and evaluate the performance of different interconnection and data transmission mechanism. The test result shows that the model can accurately simulate the communication performance for interconnect points in multi-core system,which is helpful for the whole system performance evaluation and curtaining the hardware design cycle.