Data Path Design of FPGA-based HW/SW Co-simulation Platform

Since the simulation speed is too low for current SoC design process,based on PLI mechanism,we design a data path that efficiently supports FPGA-based HW/SW co-simulation platform.With simulation tools and winsock API,the PC terminal constructs downstream channel that generates and transmits stimulus.With the SoC based on Microblaze,the FPGA terminal constructs upstream channel that is responsible for simulation data loading and results feedback.Both terminals complete physical transmission through Ethernet.Finally,the whole project implemented with Xilinx development board.Experimental results show that this design can effectively improve simulation efficiency and support HW/SW co-simulation of large scale SoC.Meanwhile,the design has the advantages of low hardware cost and strong universality.