Research on theoptimized design of anti-SEU for bus controller chip

With the development of integrated circuit manufacturing technology, memory cells such as registers and SRAMs are more and more vulnerable to single-event upset (SEU) effect in space radiation environment. There are two traditional anti-SEU methods, i.e. manufacturing process reinforcement and design reinforcement. The former depends on the process platform, which is difficult and has a long period. The latter is only for specific SEU sensitive elements of the chip. By proposing a chip-level anti-SEU reinforcement design method for an universal bus controller chip, using redundant coding and scrubbing methods, the anti-SEU ability of the chip can be further improved. Meanwhile, by dividing influence domain and adding interrupt sources, the chip's SEU-sensitive elements can be easily identified, which is very convenient for in-system refreshing and subsequent optimization. Verified by SEU experiment, the proposed chip has higher radiation reliability and fault-tolerance than the chip with traditional radiation-hardening methods.