Design of Adders for RRAM-based In-memory Computing Using Majority-Inverter Graphs

Implemented with 0.18 μm CMOS process, an adder circuit based on RRAM was presented. Different from the traditional RRAM adder based on implication operation, in the paper, we propose an emerging approach for the synthesis of RRAM-based adders using novel Majority-Inverter Graphs (MIGs). Experimental results show a full adder using MIG can achieve the whole function. Compared with the full adder based on implication, it reduces the number of computing steps obviously by parallel operation among several RRAM cells which lowers the error and improves the computing speed at the same time. This design also provides a new way of in-memory computing.