An acceleration scheme for reconfigurable multi-core system

This paper provides a layered, loosely coupled, multi-precision, multi-threaded system modeling for solving the problem of time-consuming of multi-task simulation and poor concurrency in reconfigurable multi-core system. The system model using this scheme can not only provide register-level real-time data feedback during task simulation, but also have excellent task concurrency performance. Experiments show that, compared with the data collection and calculation of traditional host computer software, the relative error of the simulator′s period prediction is less than 3%, the relative error of simulation calculation is less than 2e-5, and the simulation time is shortened by a maximum of 73.52%; after enabling the task asynchronous response optimization, Task parallelism increased by an average of 28.21%. The design has good practical value in the rapid performance evaluation of the hardware target system.