Research on Low-power Micro-System-Chip Design Based on Partial Dynamic Self-Reconfiguration

For design demand of downsizing domestic system-on-chip power, which is in order to meet requirement of aerospace electronic system, the dynamic clock management solution based on partial sel-reconfiguration technology is proposed. By analyzing the system-on-chip power composition, reduce the chip dynamic power is determined as the starting point. The integrated digital clock management unit is used as chip clock of accelerated processing unit DSP other than crystal. According to the task execution needs, DSP chip's clock is dynamic adjusted to reduce the chip energy loss.. The test results indicated that the proposed scheme effectively reduces the power consumption of the system-on-chip and guarantees real-time.