Design of Majority Logic Gate Circuitry Based on Sorting Networks

The Majority Logic Gate (MLG) has already been used to improve the reliability of memories. As to the issue of high overheads for Majority Logic Gate, a novel MLG circuitry based on Sorting Networks is proposed. An 8-input MLG example, realized in Verilog HDL and simulated by ModelSim, has been shown to explain the structure, which includes two 4-input sorting network, four and-gates and an or-gate.Compared with the traditional MLG circuitry, the proposed circuitry can reduce 45.11% area, 60.43% power, and 35.44% delay overheads respectively. The obtained results have shown that the proposed circuitry can achieve Majority Logic function rightly.