ASRIO Switch Inside Network Design

According to the characteristics of SRIO switch data path, we proposed one design to build switch inside network. Focus on solving three problems to make switch network:1.Clock domain crossing between SRIO endpoint to endpoint; 2.SRIO transmission line's package merging and splitting; 3. Arbitration between multi-source endpoint to the same endpoint. We used VerdilogHDL to describe this design, and also design the SRIO endpoint model to connect with the network, to make the random test, we check the input and output package to verify the correctness automatic. The verification proves that this design can use SRIO end point controller in ASIC or FPGA to build SRIO switch.