Test Interface Design for On-chip Flash

A new kind of test interface for embedded Flash IP of DSP on chip is presented in this paper.By analyzing the interface of Flash IP and the test requirement,we realize the pin multiplexing logic design and the address/data converter logic design.The design reduces the number of test pins while accurately and completely test the on-chip Flash, meeting testability of the design. Simulation by Ncsim, the design meet the testing requirements,and successfully applied to a 32-bit fixed-point DSP.